1. Field of the Invention
The present invention relates to a TFT (thin film transistor) and a manufacturing method thereof and, more particularly, to a polycrystalline silicon thin film transistor for an LCD (liquid crystal display), which has both p-type and n-type transistors to form a CMOS (complementary metal-oxide semiconductor) structure for a driving circuit, and a method of manufacturing the same.
2. Description of the Related Art
In an information-oriented society these days, the importance of electronic display devices is well recognized, and the electronic displays of all kinds are widely used in various industrial fields.
Generally, an electronic display is an apparatus for visually transmitting information to a person, which means that an electrical information signal output from various electronic devices is converted into a visually recognizable optical information signal at the electronic display. Therefore, the electronic display serves as a media for connecting the person and the electronic devices.
The electronic display is generally divided into an emissive type display and a non-emissive type display. In the emissive type display, an optical information signal is displayed by using a light-emitting technique. In the non-emissive type display, an optical information signal is displayed by using an optical modulation technique such as light-reflecting, dispersing and interfering phenomenon, etc. The emissive type display is also called an active display, which includes a CRT (Cathode Ray Tube), a PDP (Plasma Display Panel), an LED (Light Emitting Diode) and an ELD (Eelectroluminescesnt Display), etc. The non-emissive display is also called a passive display, which includes an LCD (Liquid Crystal Display), an ECD (Electrochemical Display) and an EPID (Electrophoretic Image Display), etc.
The CRT is used in the image display devices such as television receivers and monitors, etc. The CRT has the highest market share mainly due to its satisfactory displaying quality and economical efficiency, but also has many disadvantages such as heavy weight, large volume and high power consumption.
Meanwhile, due to the recent rapid development of the semiconductor technology, various kinds of new electronic devices have been introduced, which they are driven by lower voltage, consume less power, and are much slimmer and lighter. This development eventually brought a new type display device, such as a flat panel type display, which is slimmer and lighter than the CRT, and driven by the lower driving voltage with lower power consumption. Among the various new flat panel type display, the LCD is much slimmer and lighter than any other displays and has the lower driving voltage and the lower power consumption while providing the displaying quality similar to that of the CRT. Therefore, the LCD is widely used in various electronic display devices.
The LCD comprises two substrates, each having an electrode, and a liquid crystal layer interposed therebetween. In the LCD, a voltage is applied to the electrodes to realign liquid crystal molecules and control an amount of light transmitted through the molecules. One of the LCDs, which is mainly used nowadays, is provided with the electrode formed at each of the two substrates and a thin film transistor for switching power supplied to each electrode. Generally, the thin film transistor (referred to as TFT, hereinafter) is formed within a pixel portion at one side of the two substrates.
The LCDs employing TFTs are divided into an amorphous type TFT-LCD and a polycrystalline type TFT-LCD. The polycrystalline type TFT-LCD has an advantage that the LCD can be driven at a high speed with low power consumption. Also, the TFT in the pixel portion can be simultaneously formed together with a semiconductor device for a drive circuit. Further, the drive circuit of the LCD normally has a CMOS (complementary metal-oxide semiconductor) structure, in which a complementary operation is achieved between different conductive types of transistors, to increase circuit performance.
However, since both an n-channel transistor and a p-channel transistor are formed together on the same substrate, a process of manufacturing the polycrystalline TFT-LCD is very complicated and difficult, as compared to the manufacturing process of the amorphous type TFT-LCD, in which a single conductivity type transistor is formed. Typically, the TFT within an LCD is formed on the substrate by a photolithography process using a mask. At the present, seven to nine sheets of mask are used for manufacturing the amorphous type TFT-LCD.
FIGS. 1A and 1B depict the cross-sectional views of a pixel portion of a substrate where a TFT is formed thereon in order to show a conventional method of manufacturing a polycrystalline TFT having a top-gate structure using seven sheets of mask.
Referring to FIG. 1A, a blocking layer 12 is formed on an entire surface of a transparent substrate 10, which is glass, quartz or sapphire. The blocking layer prevents the impurity in the substrate 10 from penetrating into a silicon layer during crystallization of an amorphous silicon layer in the subsequent process.
After depositing the amorphous silicon layer on the blocking layer 12, the amorphous silicon layer is converted into a polycrystalline silicon layer by laser or furnace annealing. Then, the polycrystalline silicon layer is patterned using a photolithography process to form an active pattern 14 using the first mask (not shown).
A gate insulating layer 16 is deposited on the active pattern 14 and the blocking layer 12. A gate conductive layer is formed over the gate insulating film 16. The gate conductive layer formed in a p-type TFT region is etched using the photolithography process to form a gate electrode (not shown) of a p-type TFT using the second mask (not shown). Then, p-type impurities are ion-implanted to form source and drain regions 15S, 15D. The gate conductive layer in an n-type TFT region is etched using the photolithography process to form a gate electrode 18 of an n-type TFT (using the third mask). N-type impurity is ion-implanted to form the source/drain region 15S, 15D. In the ion-implanting process, the gate electrode 18 blocks the impurity ion to be implanted into the underlying active pattern 14, thereby allowing a channel region 15C to be defined at the active pattern 14. Here, the process order of forming the p-type TFT, and the gate and the source/drain of the n-type TFT may be changed.
Sequentially, in order to activate the doped ions and secure the damage of the semiconductor layer, the annealing process is performed using a laser beam, etc. On the gate electrode 18 and the gate insulating layer 16, there is formed an insulating interlayer 20 made of an organic insulating material or an inorganic insulating material such as SiO2 and SiNx. The insulating interlayer 20 is partially etched by the photolithography process to form the first contact hole 22a for exposing the source region 15S and the second contact hole 22b for exposing the drain region 15D of the active pattern 14 (using the fourth mask).
On the first and second contact holes 22a, 22b and the insulating interlayer 20 is deposited a metal layer. The metal layer is patterned using the photolithography process to thereby form a source/drain electrode 26a, 26b and a data line 16c (using the fifth mask).
Referring to FIG. 1B, on the source/drain electrode 26a, 26b, the data line 26c and the insulating interlayer 20, there is formed a passivation layer 28 made of the organic insulating material and the inorganic insulating layer. The passivation layer 28 is partially etched by the photolithography process to form a via hole 30 for exposing the source electrode 26a (using the sixth mask).
Then, after a transparent conductive layer or a reflective conductive layer is deposited on the via hole 30 and the passivation layer 28, the conductive layer is patterned by the photolithography process to form a pixel electrode 32 which is connected through the via hole 30 to the source electrode 26a (using a seventh mask).
According to the conventional TFT-LCD, in order to fabricate the top-gate structure, the photolithography process is needed for patterning the seven layers of the active pattern, the gate electrode of the p-type TFT, the gate electrode of the n-type TFT, the contact hole, the data line, the via hole and the pixel electrode. Therefore, seven masks in total are necessary.
The more the number of photolithography process increases, the more the manufacturing cost and the probability of process error increase. Since the production cost of the polycrystalline TFT also increases, a technique for reducing the number of mask is necessary.
Therefore, it is the first object of the present invention to provide a polycrystalline TFT for an LCD in which various layers made of the same material are formed on the same layer to reduce the number of mask.
It is the second object of the present invention to provide a method of manufacturing a polycrystalline TFT for an LCD, in which various layers made of the same material are formed on the same layer to reduce the number of mask.
It is the third object of the present invention to provide a polycrystalline TFT for an LCD in which a contact hole and a via hole are formed at the same time to reduce the number of mask.
It is the fourth object of the present invention to provide a method of manufacturing a polycrystalline TFT for an LCD, in which a contact hole and a via hole are formed at the same time to reduce the number of mask.
To achieve the first objects of the present invention, there is provided a polycrystalline silicon TFT for an LCD. The TFT includes an active pattern formed on a substrate. A gate insulating layer is formed on the substrate including the active pattern. A gate line is formed on the gate insulating layer to cross the active pattern and includes a gate electrode for defining the first impurity region, the second impurity region and a channel region of the active pattern. An insulating interlayer is formed on the gate insulating layer including the gate line. A data line is formed on the insulating interlayer and is connected to the second impurity region through the first contact hole which is formed through the gate insulating layer and the insulating interlayer on the second impurity region. A pixel electrode is formed on the insulating interlayer by patterning a same conductive layer as the data line and is connected with the first impurity region through the second contact hole which is formed through the gate insulating layer and the insulating interlayer on the first impurity region.
To achieve the second object of the present invention, there is provided a method of manufacturing a polycrystalline silicon TFT for an LCD. In the above method, an active pattern is formed on a substrate and then a gate insulating layer is formed on the substrate including the active pattern. Then, a gate layer is formed on the gate insulating layer and then the gate layer is patterned to form a gate line. An ion-implanting process is performed to form the first impurity region and the second impurity region at the active pattern. An insulating interlayer is formed on the insulating layer and on the gate line. The insulating interlayer and the gate insulating layer are partially etched to form the first contact hole for exposing the second impurity region and the second contact hole for exposing the first impurity region. A conductive layer is formed on the insulating interlayer including the first and second contact holes and then the conductive layer is patterned to form a data line which is connected through the first contact hole to the second impurity region and a pixel electrode which is connected through the second contact hole to the first impurity region.
To achieve the third object of the present invention, there is provided a polycrystalline silicon TFT for an LCD. The TFT has an active pattern formed on a substrate. A gate insulating layer is formed on the substrate including the active pattern. A gate line is formed on the gate insulating layer to cross the active pattern and includes a gate electrode for defining the first impurity region, the second impurity region and a channel region of the active pattern. The first insulating interlayer is formed on the gate insulating layer and on the gate line. A data line is formed on the first insulating interlayer and the second insulating interlayer formed on the first insulating interlayer and on the data line. A pixel electrode is formed at the second insulating interlayer and is connected with the first impurity region through the second contact hole which is formed through the gate insulating layer, the first insulating interlayer and the second insulating interlayer on the first impurity region. An electrode is formed on the second insulating layer by patterning a same conductive layer as the pixel electrode. The electrode connects the data line and the second impurity region through the first contact hole which is formed through the gate insulating layer and the first and second insulating interlayers on the second impurity region and the third contact hole which is formed at the second insulating interlayer on the data line.
To achieve the fourth object of the present invention, there is provided a method of manufacturing a polycrystalline silicon TFT for an LCD which comprises the steps as follows:
An active pattern is formed on a substrate and a gate insulating layer is formed on the substrate including the active pattern. A gate layer is formed on the gate insulating layer and then patterned to form a gate line. An ion-implanting process is performed to form the first impurity region and the second impurity region of the active pattern. The first insulating interlayer is formed on the insulating layer including the gate line and then a data line is formed on the first insulating interlayer. The second insulating interlayer is formed on the first insulating interlayer and on the data line. The second insulating interlayer, the first insulating interlayer or the gate insulating layer are partially etched to form the first contact hole for exposing the second impurity region, the second contact hole for exposing the first impurity region and the third contact hole for exposing the data line. A conductive layer is formed on the second insulating interlayer and then patterned to form an electrode which connects the data line and the second impurity region through the first and third contact holes, and a pixel electrode which is connected through the second contact hole to the first impurity region.
According to the first embodiment of the present invention, a data line and a pixel electrode capable of being made from the same material are formed from the same layer. Contact holes for respectively connecting the data line and the pixel electrode to a source region and a drain region of an active pattern are simultaneously formed. Therefore, the number of used mask is reduced from 7 sheets to 5 sheets, thereby simplifying a manufacturing process.
According to the second embodiment of the present invention, in order to prevent the data line and the pixel electrode formed from the same layer, as described in the first embodiment, from being exposed to outside, a passivation layer is formed on the data line and the pixel electrode. At this time, since the passivation layer of a pad region is removed, a mask for patterning the passivation layer is further needed comparing with the first embodiment. The number of the mask is 6 sheets.
According to the third embodiment of the present invention, in a state that the surface of the insulating interlayer is not exposed by the photoresist pattern, since the gate insulating layer is etched to form contact holes, a surface damage of the insulating interlayer can be prevented.
According to the fourth embodiment of the present invention, after forming the data line, contact holes are formed at the same time. An electrode connected with the pixel electrode and the data line is formed from the same layer. That is, the image signal applied to the data line is transmitted to the drain region of the TFT through the drain electrode formed from the same layer as in the pixel electrode. Further, the pixel electrode is directly connected to the source region of a TFT without a separate source electrode. Therefore, the number of used mask is reduced from 7 sheets to 6 sheets.
According to the fifth embodiment of the present invention, in case the second insulating interlayer for insulating the data line and the pixel electrode is made of a photosensitive organic material, after patterning the second insulating interlayer through a developing process during an exposure process without a separate etching process, the contact holes for exposing the data line and the source/drain region is formed by a single photolithography process using a etching property difference between an oxide layer (or a nitride layer) and a metal layer in a dry etching process using fluorine-based gas.
According to the sixth embodiment of the present invention, it is possible to concurrently form contact holes having different depths using a slit mask or half-tone mask.
Therefore, according to the present invention, the number of mask is reduced as compared to a conventional method, thereby simplifying the manufacturing process and reducing the manufacturing time and cost.